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P7UWaterXinjiang4G/hardinterface/inc/UWater_gp22_driver.h

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修改readme20231114
2024-06-03 15:49:39 +08:00
/*
* File: hc32_gp30_driver.h
* Author: Administrator
*
* Created on 2020-7-10
*/
#ifndef UWater_GP22_DRIVER_H
#define UWater_GP22_DRIVER_H
#include "sys_config.h"
#include "ddl.h"
#include "type.h"
/*************************<2A>궨<EFBFBD><EAB6A8>****************************/
#define DLY_SWITCH 1//DLY<4C>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD>,<2C><><EFBFBD>δ˴<CEB4><CBB4>뼴<EFBFBD>ر<EFBFBD><D8B1>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>
#define GP30_LOAD_EER_CNT 300 // GP30<33><30>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͺ󣬲<CDBA>ѯ<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>ɵĴ<C9B5><C4B4><EFBFBD>
#define GP30_LOAD_FAIL_CNT 3 // GP30FWD<57><44><EFBFBD>ز<EFBFBD><D8B2><EFBFBD>ȥ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//#define GP22_CLK_CAL 2400
#define GP22_OVERTIME 110000 //GP22<32><32>ʱ<EFBFBD><CAB1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20><>ʱ110ms
#define GP22_RESET_TIME 1000
#define GP22_IO_DELAY_TIME 1000
#define SAMPLE_OK 1
#define SAMPLE_ERR 2
#define SAMPLE_8HZ 1
#define SAMPLE_16HZ 2
//#define SAMPLE_BUBBLE 4
#define SAMPLE_ING 4
#define ERR_SHORT 1
#define ERR_BROKEN 2
#define ERR_NO_WATER 4
#define ERR_GP22_ERR 8
#define ERR_REVERSE 16
//<2F><>״̬<D7B4><CCAC>
#define GP22_S0 0
#define GP22_S1 1
#define GP22_S2 2
#define GP22_S3 3
#define GP22_S4 4
#define GP22_S5 5
#define GP22_S6 6
#define GP22_S7 7
#define GP22_S8 8
#define GP22_S9 9
#define GP22_S10 10
#define GP22_S11 11
#define GP22_S12 12
#define GP22_S13 13
#define GP22_S14 14
#define GP22_S15 15
#define GP22_S16 16
#define GP22_S17 17
#define GP22_S18 18
#define GP22_S19 19
#define GP22_S20 20
#define GP22_S21 21
#define GP22_S22 22
#define GP22_S23 23
#define GP22_S24 24
#define GP22_S25 25
#define GP22_S26 26
#define GP22_S27 27
#define GP22_S28 28
#define GP22_S29 29
#define GP22_S30 30
#define GP22_S31 31
#define GP22_S32 32
#define GP22_S33 33
#define GP22_S34 34
#define GP22_S35 35
//SPIͨ<49><CDA8><EFBFBD>ж<EFBFBD>״̬<D7B4><CCAC>
#define SPI_ISR_S0 0
#define SPI_ISR_S1 1
#define SPI_ISR_S2 2
#define SPI_ISR_S3 3
#define GP30_FIRST_FLAG 0x11
#define GP30_DRIVER_SYSTEM_PARM_ADDR 0x900
#define GP30_FIRSTPOWER_ADDR 0x932
#define AS6031_FWC_BLOCK_LENGTH 128 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>
//GP22ʹ<32>õ<EFBFBD>SPI<50>ڣ<EFBFBD><DAA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI<50><49>1<EFBFBD><31><EFBFBD><EFBFBD>GP22<32><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>SPI<50><49><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>SPIʹ<49><CAB9>Ҫ<EFBFBD><D2AA>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>
//ʱ<><CAB1>Դ
#define GP22_SPI_FCLK STM32_SYSCLK
//ʱ<>ӷ<EFBFBD>Ƶ
#define GP22_SPI_BR_2 ((uint32_t)0x00u)
#define GP22_SPI_BR_4 ((uint32_t)0x01u)
#define GP22_SPI_BR_8 ((uint32_t)0x02u)
#define GP22_SPI_BR_16 ((uint32_t)0x03u)
#define GP22_SPI_BR_32 ((uint32_t)0x80u)
#define GP22_SPI_BR_64 ((uint32_t)0x81u)
#define GP22_SPI_BR_128 ((uint32_t)0x82u)
//SPIʱ<49><CAB1>Ƶ<EFBFBD><C6B5>
#define GP22_SPI_BR_USE GP22_SPI_BR_8
//ʱ<>Ӽ<EFBFBD><D3BC><EFBFBD>
#define GP22_SPI_POLARITY_LOW (0u)
#define GP22_SPI_POLARITY_HIGH (0x8u)
// SPI Clock Phase
#define GP22_SPI_PHASE_1EDGE (0u)
#define GP22_SPI_PHASE_2EDGE (0x4u)
// X32K OUT
#define GP22_X32K_GPIO (GpioPortB)
#define GP22_X32K_PIN (GpioPin3)
#define GP22_X32K_AF (GpioAf6)
#define GP22_GPIO_AF_NULL (GpioAf0)
// SPI IO<49><4F><EFBFBD>á<EFBFBD><C3A1><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD>ʱ<EFBFBD><CAB1>
#define GP22_SPI (M0P_SPI1)
#define GP22_SPI_CLK (SysctrlPeripheralSpi1)
#define GP22_SPI_RESET (ResetMskSpi1)
//#define GP22_RSTN_PORT (GpioPortA)
//#define GP22_RSTN_PIN (GpioPin3)
#define GP22_INT_GPIO (GpioPortD)
#define GP22_INT_PIN (GpioPin2)
#define GP22_INT_GPIO_MODE (GpioIrqFalling)
#define GP22_INT_IRQ (PORTD_F_IRQn)
#define GP22_INT_IRQLevel (IrqLevel3)
#define GP22_SSN_PORT (GpioPortD)
#define GP22_SSN_PIN (GpioPin0)
#define GP22_SSN_AF (GpioAf2)
#define GP22_SCK_GPIO (GpioPortD)
#define GP22_SCK_PIN (GpioPin1)
#define GP22_SCK_AF (GpioAf2)
#define GP22_SO_GPIO (GpioPortD)
#define GP22_SO_PIN (GpioPin3)
#define GP22_SO_AF (GpioAf2)
#define GP22_SI_GPIO (GpioPortD)
#define GP22_SI_PIN (GpioPin4)
#define GP22_SI_AF (GpioAf2)
#define GP22_PRIORITY (IrqLevel3)
/***********<2A><><EFBFBD>ſ<EFBFBD><C5BF><EFBFBD>*************/
/***********<2A><><EFBFBD>ſ<EFBFBD><C5BF><EFBFBD>*************/
//#define GP22_RSTN_ENABLE Gpio_WriteOutputIO(GP22_RSTN_PORT, GP22_RSTN_PIN, GPIO_PIN_RESET)
//#define GP22_RSTN_DISABLE Gpio_WriteOutputIO(GP22_RSTN_PORT, GP22_RSTN_PIN, GPIO_PIN_SET)
#define GP22_SSN_ENABLE Spi_SetCS(GP22_SPI, FALSE);
#define GP22_SSN_DISABLE Spi_SetCS(GP22_SPI, TRUE);
#pragma pack(1)
typedef union
{
struct
{
u8 flow_up_time[4];
u8 flow_down_time[4];
}flow; //GP22
u32 gp22[2];
} DATA_GP22;
typedef union
{
uint8_t value[4];
uint32_t data;
} U8TOU32;
typedef union
{
uint8_t value[8];
uint64_t data;
} U8TOU64;
typedef union
{
uint8_t value[2];
uint16_t time;
} U8TOU16;
/* SPI Configuration Structure definition
*/
typedef struct
{
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
This parameter can be a value of @ref SPI_Clock_Polarity */
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
This parameter can be a value of @ref SPI_Clock_Phase */
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
hardware (NSS pin) or by software using the SSI bit.
This parameter can be a value of @ref SPI_Slave_Select_management */
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
used to configure the transmit and receive SCK clock.
This parameter can be a value of @ref SPI_BaudRate_Prescaler
@note The communication clock is derived from the master
clock. The slave clock does not need to be set. */
} SPI_InitTypeStruct;
/**
* @brief SPI handle Structure definition
*/
typedef struct _GP22_SPI_STRUCT
{
M0P_SPI_TypeDef *Instance; /* SPI registers base address */
SPI_InitTypeStruct Init; /* SPI communication parameters */
uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
uint16_t TxXferSize; /* SPI Tx Transfer size */
uint16_t TxXferCount; /* SPI Tx Transfer Counter */
uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
uint16_t RxXferSize; /* SPI Rx Transfer size */
uint16_t RxXferCount; /* SPI Rx Transfer Counter */
uint32_t CRCSize; /* SPI CRC size used for the transfer */
void (*RxISR)(struct _GP22_SPI_STRUCT *hspi); /* function pointer on Rx IRQ handler */
void (*TxISR)(struct _GP22_SPI_STRUCT *hspi); /* function pointer on Tx IRQ handler */
uint32_t ErrorCode; /* SPI Error code */
}GP22_SPI_STRUCT;
void Gp22Init(void);
void Gp22ErrInit(void);
u8 Gp22IfIdle(void);
//uint8_t Gp22StartTask(uint8_t task);
uint8_t Gp22CheckErrMsg(void);
void Gp22ClearErrMsg(u8 clear_bit);
uint8_t Gp22CheckSampleMsg(void);
void Gp22ClearSampleMsg(void);
void Gp30Sleep(void);
void Gp22DateBuf(u32 **date_buf);
void Gp22TypeBuf(u32 **type_buf);
void Gp22_TOF_AM_Buf(u32 **TOF_AM_buf);//<2F><><EFBFBD><EFBFBD><EFBFBD>̼<EFBFBD><CCBC><EFBFBD><EFBFBD>ڻ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void Gp22DOWN_AM_Buf(u32 **down_AM_buf);
void Gp22UP_AM_Buf(u32 **up_AM_buf);//<2F><><EFBFBD><EFBFBD><EFBFBD>̼<EFBFBD><CCBC><EFBFBD><EFBFBD>ڻ<EFBFBD>ȡUP<55><50><EFBFBD><EFBFBD>ֵ
void Gp22SetSampleRateMsg (u8 rate);
u8 Gp22CheckSampleRateMsg(void);
void Gp22ClearSampleRateMsg(void);
void Gp22SetBufferLength (u8 lenth);
void Gp22SetmaxDIFTOF (u32 maxDIFTOF);
void Gp22SetminDIFTOF (u32 minDIFTOF);
void Gp22SetmaxTOF (u32 maxTOF);
void Gp22SetminAMP (u32 minAMP);
uint32_t Gp22TimeDiffer(uint8_t time);
uint8_t Gp22IfSleep(void);
void Gp22PreSleep(void);
void Gp22WakeSleep(void);
void Gp22MachineDriver(void);
//uint8_t Gp22CheckMeasureMsg(void);
//void Gp22ClearMeasureMsg(void);
//u32 Gp22CheckStillTimeApp(void);
//void Gp22GainConfig(u32 cfg);
//void InsertSort(float r[],u8 n);
u8 GP22_Check_IntMsg(void);
#endif /* UWater_GP22_DRIVER_H */